180nm CMOS
- August 18, 2021
- Posted by: OptimizeIAS Team
- Category: DPN Topics
No Comments
180nm CMOS
Subject – Science and Technology
Context: India’s Milestone in Semiconductor R&D, IIT Bombay demonstrates Memory Technology on 180nm CMOS Process
Concept:
- The natural world is analog while computing is digital. Computers perceive the natural world through sensor chips whose output is analog.
- The analog output is converted into the language of computers through a digitizer chip or an analog to digital converter (ADC).
- The generic chips can now be designed and application-specific offsets added to make expensive custom chip design redundant, saving time and money for the user.
- IIT Bombay partnered with SCL to successfully demonstrate CMOS 180nm based production-ready 8-bit memory technology.
- The 180 nm process refers to the level of MOSFET (CMOS) semiconductor process technology that was commercialized around the 1998–2000 timeframe by leading semiconductor companies
- The Government of India took cognizance of the significance of R&D in innovation-driven semiconductor manufacturing, at IIT Bombay and the Indian Institute of Science.
- The team at IIT Bombay was supported by the Department of Science and Technology’s Intensification of Research in High Priority Area (IRHPA).Aspects of the work were funded by MeitY/DST’s Nano electronics Network for Research and Applications (NNetRA)
Advantage of CMOS 180nm
- The chip uses one-time programmable (OTP) memory based on ultra-thin deposited silicon dioxide (a few atoms thick) instead of the existing gate oxide-based OTP technology.
- In contrast to the high voltage required by gate oxide breakdown (a popular OTP memory), IIT Bombay’s memory chip requires less power and chip-area as the need for boosted voltage supply is avoided.
- The Memory technology is critical to data security.
- It will be a game changer by enabling secure memory and encryption hardware for the country.