The DIR-V programme

The DIR-V programme

Subject: Governance

Section: Schemes

Context: Minister of State for Electronics and Information Technology Rajeev Chandrasekhar has launched Digital India RISC-V Microprocessor (DIR-V) Program.

Objective of the program:

• Its overall aim is to enable the creation of Microprocessors for the future in India, for the world and achieve industry-grade silicon and Design wins by December 2023.
• DIR-V program will see partnerships between Start-ups, Academia and  Multinationals, to make India not only a RISC-V Talent Hub for the World but also supplier of RISC-V  System on Chips for Servers, Mobile devices, Automotive and Microcontrollers across the globe.
• Strategic Roadmap for India’s Semiconductor Design and Innovation to catalyse the semiconductor ecosystem.
• The government initiative is pegged to be another concrete step towards realizing the ambition of self-reliance towards “Atmanirbhar Bharat”.
• The DIR-V programme will consolidate and leverage the ongoing efforts in the country with an integrated multi-institutional and multi-location team, finalise the formal architecture and target performance of chipsets, support original equipment makers and design wins in India and abroad. The DIR-V initiative is part of the government’s₹76,000-crore effort to build a semiconductor ecosystem in the country.

Vega, Shakti

• IIT-Madras and the Centre for Development of Advance Computing (CDAC) have developed two micro processors named Shakti (32bit) and Vega (64 bit), respectively, using Open Source Architecture under the Microprocessor Development Programme of MeitY.